VLSI Implementation of Integrated Massive MIMO Systems (IMMS) for N-point FFT/IFFT Processor

نویسندگان

چکیده

The 5G technologies and OFDM introduce a substantial element of latency in the baseband Massive MIMO system. To declaim low delay demand multiple input outputs, Fast Fourier Transform (FFT) also consequent implementation was proposed. main idea this proposed system is to utilize VLSI chip routing technology reduce computations, processing time, latency. This number computational complexities downlink reorder uplink. In implementation, area FFTs IFFTs occupied by memories, these memories can be extracted using registers or RAM. An efficient data programming approach for butterflies has been developed embedded with inputs outputs (MIMO), known as mass systems. Using scheme (Integrated MIMO), N point FFT/IFFT processor design achieves better throughput lowest than single-input pipelined FFT IFFT architectures. an N-point FFT/IFFT, introduced Technology leads more reduction named “Integrated Systems” (IMMS).

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ژورنال

عنوان ژورنال: International journal of electrical & electronics research

سال: 2022

ISSN: ['2347-470X']

DOI: https://doi.org/10.37391/ijeer.100458